About this role
Envision Employment Solutions is currently looking for a Senior RTL Design Engineer for one of our partners, an IT Services and IT Consulting company.
THE ROLE
You'll take a design from architecture to tapeout, defining the microarchitecture, writing the RTL, and making sure it's clean enough for synthesis, timing and test teams to build on. It's hands on design work on complex SoCs, with a real say in how each unit is built.
WHAT YOU'LL DO
Own feasibility studies and help define system architecture, requirements and external interfacesDevelop microarchitecture and logic design with functional leads, from architecture to tapeoutWrite RTL in Verilog and SystemVerilog, and run lint and CDC checks with tools such as Synopsys VC SpyGlassCreate timing constraint files and support synthesis with Synopsys Design CompilerWork with synthesis, STA, PD and DFT teams to meet functional, performance, power and area goalsDebug and fix design issues, and develop flows and scripts to support design work
WHAT WE'RE LOOKING FOR
7+ years of experience in VLSI designBSc or MSc in Electrical or Computer EngineeringStrong Verilog and SystemVerilog skillsExperience defining microarchitecture for complex design units, with SoC design experienceProficient in lint, CDC and low power design practicesWorking knowledge of synthesis and STA toolsFamiliarity with ARM, RISC-V or x86 instruction setsScripting in Python and Tcl (Perl or C is a plus)Good understanding of verification methodologiesExcellent English and strong communication skills
YOU'LL THRIVE HERE IF YOU
You enjoy turning a spec into a clean, well structured microarchitectureYou fix the root cause of a bug, not just the symptomYou care about how your RTL behaves downstream in synthesis and timingYou like working closely with verification, PD and DFT teamsYou want ownership of a design from first idea to silicon