About this role
Responsibilities: - Working with a small team to implement, debug, and verify a high-performance PCIe interface. - Build the infrastructure to support PCIe during FPGA emulation and bringup. Qualifications: - Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply). - Experience and background with PCIe controller/device design. - Familiarity with bus traffic analyzers and logic analyzers. - Familiarity with data eye and BER analysis. - Verilog / System Verilog / Synthesis / STA / CDC / Lint experience. Benefits: - Competitive salary and benefi