About this role
NAND Designer / Layout at Micron Technology, Inc.. Location: Tokyo, Tokyo, Japan. Role: designing circuits, running simulations, optimizing performance Requirements: Expertise in analog and mixed-signal circuit design, experience with FINESIM, HSPICE, and VERILOG for circuit simulation, ability to analyze and optimize timing/area/power for NAND flash, strong analytical and communication skills. Category: Engineering Seniority: Senior Level Tools: FINESIM, HSPICE, VERILOG Commitment: Full Time Workplace: Onsite Languages: Japanese, English