About this role
Digital Design Engineer at Credo. Location: San Jose, California, United States. Role: defining architecture, developing rtl, verifying modules Requirements: BS/MS/PhD in EE/CE,5+ years digital RTL design experience,SystemVerilog proficiency,ASIC flow and EDA tool experience,high-speed SerDes/DSP knowledge,Python/MATLAB/C++ familiarity. Category: Engineering Seniority: Senior Level Tools: System Verilog, Synopsys, Cadence, Siemens, Python, MATLAB, C++ Commitment: Full Time Workplace: Onsite Languages: English