About this role
Staff Verification Engineer at Credo. Location: Pittsburgh, Pennsylvania, United States. Role: defining strategy, developing testbench, leading debug Requirements: 5+ years ASIC/SoC verification experience, Bachelor’s or Master’s in electrical/computer engineering, expertise in SystemVerilog/UVM, constrained-random and assertion verification, scripting in Python/Perl/Tcl/shell, Cadence/Mentor/Synopsys tool experience, protocol knowledge (Ethernet, PCIe, CXL, AMBA). Category: Engineering Seniority: Senior Level Tools: SystemVerilog, UVM, Python, Perl, Tcl, shell, Cadence, Mentor, Synopsys Commitment: Full Time Workplace: Onsite Languages: English