About this role
<p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Title: Senior Specialist, Electrical Engineering</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Code: 38226</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Job Location: Fort Wayne, IN</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"><br>Job Description:</span></strong></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">This position will be responsible for providing Electrical Engineering support to maintain large system cable architecture across multiple customer-funded programs within our Spectral Solutions business area within the Space Mission Systems segment of L3Harris Corporation. This role will lead the design of system level cable architecture, maintain interconnect diagrams supporting system and lower-level specifications, define interconnect hardware, and own the review of all cable drawings. </span></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Our Spectral Solutions business area serves a broad array of government, civil and commercial customers by enhancing information superiority, contributing to our national security and providing actionable data for the protection of property and human life. We specialize in high-reliability space-based remote sensing end-to-end systems that offer active and motion imaging and data processing, exploitation and dissemination. We also provide solutions that map and monitor the earth for a variety of commercial and governmental users.</span></p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif"><br><strong>Essential Functions:</strong></span></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Design of system and subsystem cable architecture.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Create and maintain interconnect diagrams and drawings.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Establish and maintain interconnect specifications and requirements.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Evaluate and analyze EMI, Signal Integrity, and IR drop impacts on cable signals.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Provide Signal Integrity insight and guidance to design team.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Evaluate and select key materials and components for the design environment</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Direct and guide cable design teams</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Perform worst-case analysis on power and analog circuits.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Participate and contribute in technical reviews.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Ability to obtain and maintain a security clearance</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Qualifications:</span></strong></p> <ul style="margin-top:0.0in;margin-bottom:0.0in"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Bachelor of Science Degree in Engineering and a minimum of 6 years of prior relevant experience. Graduate Degree in Engineering and a minimum of 8 years of prior related experience. In lieu of a degree, minimum of 10 years of prior related experience.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with schematics</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with Root Cause Corrective Action</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:14.0pt;font-family:Verdana, sans-serif"><br>Preferred Additional Skills:</span></strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with schematic entry, simulation, analysis of power, analog, and digital circuits.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience writing performance specifications.</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience designing in a space environment.</span></li> </ul> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience with SPICE, MathCAD, Matlab, Simulink, Allegro and MentorGraphics tools</span></li> <li style="margin:0.0in 0.0in 0.0in 0.0px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif">Experience leading teams and project designs</span></li> </ul> <p style="margin:0.0in 0.0in 0.0in 0.5in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in 0.0in 0.0in 0.5in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0in 0.0in 0.0in 0.5in;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:14.0pt;font-family:Verdana, sans-serif;color:white">#LI-KB1</span></p>