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Sr. Software Engineer (Teradyne, Oregon) (Tualatin, OR, US) @ Teradyne Inc

Tualatin, OR, USOnsiteFull-time
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About this role

<p style="text-align:left"><span style="font-size:10.0pt"><span style="font-family:Arial, Helvetica, sans-serif">We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne&apos;s test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, <a href="http://www.teradyne.com/">Teradyne</a> companies deliver manufacturing automation across industries and applications around the world!</span></span></p> <p style="text-align:left"> </p> <p style="text-align:left"><span style="font-size:10.0pt"><span style="font-family:Arial, Helvetica, sans-serif">We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.</span></span></p><p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white">Our Purpose <br></span></strong><span style="background-color:white">TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.<br><br>We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.</span><strong><span style="background-color:white"><br><br>Opportunity Overview<br></span></strong></span></p> <p style="margin:0.0in;font-size:10.0pt;font-family:'Times New Roman', serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">We are seeking a Senior System Integration and HAL Software Engineer to join our Semiconductor Test Engineering team. In this role, you will take ownership of developing Hardware Abstraction Layer (HAL) software and leading system integration efforts for next‑generation test instruments. You will collaborate across hardware, software, and systems teams to ensure complex components come together into a scalable, high‑performance solution.</span></p> <ul style="margin-top:0.0in;margin-bottom:0.0in" type="disc"> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Lead the architecture and development of HAL software for automated test equipment</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Partner with Hardware, Software, and Systems teams to define robust and maintainable software interfaces</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Execute product integration, verification, and detailed debug in lab environments</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Enable software reuse by abstracting low‑level hardware details</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Mentor junior team members and act as technical lead on HAL initiatives</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Define scalable, high‑quality, extensible, and maintainable HAL interfaces for multiple instruments</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Perform hands‑on system integration, verification testing, root‑cause analysis, and debug</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Collaborate with Logic Design and Verification teams on hardware/software abstraction</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Drive technical decisions, ensure best practices, and support junior engineers</span></li> <li style="margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;font-size:12.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Contribute to continuous improvement of engineering processes and tools</span></li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt"><strong><span style="background-color:white"><br>All About You<br></span></strong></span><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt">We seek an engineer who thrives at the intersection of hardware and software, enjoys solving complex system‑level challenges, and has a passion for delivering high‑quality products. You are a collaborative partner and a strong technical contributor who elevates the teams you work with.</span></span></p> <ul> <li style="list-style-type:none;color:black"> <ul type="disc"> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">BS degree required in Electrical Engineering, Computer Engineering, Computer Science, or related technical field</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">10+ years of hands-on experience in development and system integration</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Expertise in C and C++ for FPGA‑based embedded systems and instruments</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Strong experience with system integration in Linux and Windows environments</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Proficiency with scripting languages (Python, TCL, Perl, etc.)</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Experience working in cross‑functional engineering teams</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Tools: Microsoft Visual Studio, Git, ClearCase/Version Vault, JIRA, and others</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Operating Systems: Linux, Windows</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Advanced degree (MS or PhD) in a related technical field</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Familiarity with Verilog, System Verilog, VHDL, UVM</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Experience with FPGA‑based system debug or hardware validation</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Background in automated test equipment or semiconductor instrumentation</span></li> </ul> </li> </ul> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"> </p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white"> </span></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white">Compensation:</span></strong><span style="background-color:white"><br>The base salary range for this role is $161,700 - $258,800. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location. </span></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white"> </span></strong></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white">Incentive Plan: </span></strong><span style="background-color:white">This job is eligible for discretionary bonus(es) based on financial performance. </span></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><em><span style="background-color:white"> </span></em></span></p> <p style="margin:0.0in;line-height:normal;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="background-color:white">Benefits:</span></strong></span></p> <p style="margin:0.0in;font-size:11.0pt;font-family:Calibri, sans-serif"><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black">Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation &amp; holidays, tuition assistance programs, and more. Please click <a style="color:black" href="https://www.teradyne.com/2025-open-enrollment/">here</a> to see details. </span></p> <p><span style="font-family:arial, helvetica, sans-serif;font-size:12.0pt;color:black"><strong><span style="line-height:107%;background-color:white">#LI-KD1</span></strong></span></p>

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