About this role
We are seeking a talented and innovative Staff ASIC Design Engineer to join our dynamic team in Hyderabad, India. In this role, you will take ownership of critical ASIC design projects, driving the development and implementation of sophisticated System-on-Chip (SoC) solutions. You will collaborate with cross-functional teams to deliver high-quality silicon products from concept through production maturity. This is an excellent opportunity for an experienced design professional to make a significant impact on cutting-edge semiconductor technology while fostering innovation and technical excellence.
Design and implement RTL blocks with a focus on micro-architecture optimization, ensuring efficient and implementable solutionsDevelop clear, comprehensive micro-architecture specifications and technical documentation for various design componentsExecute synthesis, timing closure, and optimization activities to meet performance and power requirementsCollaborate effectively with firmware, software, design verification, FPGA, DFT, and backend teams throughout all stages of ASIC developmentSupport prototyping activities, test program development, and comprehensive chip validation from initial bring-up through production maturityConduct design bring-up and debug on FPGA-based emulation platforms, identifying and resolving complex technical issuesImplement and analyze assertions and coverage metrics to ensure design quality and completenessWork with industry-standard interface protocols including PCIe, USB, Ethernet, DDR/LPDDR4/5, I2C/I3C, eSPI, and SPIMentor junior engineers and provide technical guidance on design best practices and methodologiesUtilize scripting languages and repository management tools to streamline design workflows and maintain code quality 7+ years of hands-on experience in RTL logic design, verification, synthesis, and timing optimizationDemonstrated expertise in writing efficient, synthesizable RTL code in Verilog with strong SoC integration knowledgeProficiency in micro-architecture design and the ability to translate specifications into robust implementationsSolid understanding of assertions, coverage analysis, RTL synthesis methodologies, and timing closure techniquesExtensive experience with interface protocols such as PCIe, USB, Ethernet, DDR/LPDDR4/5, I2C/I3C, eSPI, and SPIProven experience with FPGA-based emulation platforms (HAPS, Veloce) for design validation and debuggingFluency with scripting languages including Perl and Python for design automation and tool developmentExperience with repository management tools (Bitbucket, Jenkins) and bug tracking systems (JIRA)Successful completion of at least one full tape-out cycle from design through silicon validationStrong communication and documentation skills with the ability to articulate complex technical concepts clearlyDemonstrated ability to work collaboratively in cross-functional team environmentsExcellent analytical and problem-solving capabilities with attention to detailPreferred: Silicon bring-up and debug experience on actual hardwarePreferred: Experience mentoring or leading junior design engineersPreferred: Familiarity with design methodologies, standards, and industry best practices Axiado is committed to attracting, developing, and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley, with access to the world's leading research, technology and talent.
We are building an exceptional team to secure every node on the internet. For us, solving real-world problems takes precedence over purely theoretical problems. As a result, we prefer individuals with persistence, intelligence and high curiosity over pedigree alone. Working hard and smart, continuous learning and mutual support are all part of who we are.
Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, non-disqualifying physical or mental disability, national origin, veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications, merit, and business need.