About this role
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
Join onsemi’s new and growing RISC-V division and help ensure the functional correctness, quality, safety, and security of configurable and customizable RISC-V CPU IP.
You will participate in the complete verification process, from understanding requirements and defining verification plans and strategies to implementation, debugging, metric-driven verification closure, tape-out, and delivery of reviewable evidence.
You will combine proven SystemVerilog/UVM simulation methodologies with innovative and advanced formal verification techniques. You will also help define practical AI-assisted verification approaches focused on measurable quality and engineering effectiveness, not simply producing unchecked AI-generated content.
• Define and execute verification plans for RISC-V CPU features, configurations, and custom extensions. • Translate architecture, product, safety, and security requirements into measurable verification objectives and closure criteria. • Develop reusable SystemVerilog/UVM environments, assertions, checkers, reference models, coverage models, and regression infrastructure. • Verify ISA behavior, privilege modes, exceptions, interrupts, memory interfaces, debug functionality, configurations, and custom instruction interactions. • Combine simulation and advanced formal techniques to address complex control logic and high-risk corner cases. • Apply metric-driven verification to measure progress, identify quality gaps, and support sign-off decisions. • Debug complex failures and collaborate with architecture, RTL design, functional safety, security, and SoC integration teams. • Execute requirements traceability and fault-oriented verification with the rigor required to pass external safety and security assessments for multiple certification programs. • Help define and evaluate AI-assisted verification methods, including their benefits, limitations, quality controls, and safeguards. Why join us? • Join a new and growing RISC-V division and help shape its verification practices, infrastructure, and engineering culture. • Work alongside a highly skilled verification team, including principal and staff engineers with many years of CPU verification experience. • Learn the complete CPU verification process, from planning and strategy through implementation, closure, tape-out, and assessment-ready evidence. • Join a team with a proven track record of delivering and taping out multiple CPUs and products with zero critical bugs. • Verify CPU IP that will be implemented in real products and taken through silicon tape-out, not limited to research or prototypes. • Work with proven UVM simulation methodologies and innovative formal verification techniques. • Develop expertise in RISC-V architecture, configurable CPU IP, custom extensions, functional safety, and security. • Help shape responsible AI-assisted verification practices where quality, effectiveness, and expert oversight are essential. • Contribute to CPU technologies for automotive, industrial, security, and edge-AI applications.
• Strong experience in CPU, SoC, or complex reusable digital IP verification. • Advanced knowledge of SystemVerilog, UVM, assertions, functional coverage, and verification debugging. • Experience with verification planning, metric-driven execution, coverage analysis, and quality-based closure. • Understanding of processor concepts such as pipelines, privilege levels, exceptions, interrupts, memory access, and debug. • Experience with formal verification or strong motivation to develop advanced formal verification expertise. • Ability to translate technical requirements into measurable verification objectives and reviewable evidence. • Strong analytical, problem-solving, communication, and cross-team collaboration skills. • A quality-oriented engineering mindset and willingness to take ownership of assigned verification areas. • RISC-V experience is valuable. Strong verification experience with another processor architecture and motivation to develop RISC-V expertise are equally welcome. • Experience with ISO 26262, fault-oriented verification, security verification, certification activities, or AI-assisted engineering is an advantage.