About this role
SoC Architect, Coherent Interconnect at Sec. Location: San Jose or Austin. Role: design interconnects, analyze performance, collaborate with teams Requirements: 15+ years experience with Bachelors or 13+ with Masters or 11+ with PhD; strong SoC/interconnect expertise; programming in C/C++, Python; knowledge of NoC and memory subsystems. Category: Software Development Seniority: Senior Level Tools: C, C++, Python, Verilog, VHDL Commitment: Full Time Workplace: Onsite Languages: English