About this role
Technical Director Memory Controller Architect at Rambus. Location: San Jose or Hillsboro. Role: owning architecture, driving reviews, evangelizing products Requirements: BS/MS required with 20+ years semiconductor experience and ≥10 years memory logic/architecture; hands-on RTL coding, logic/physical design and DV; knowledge of HBM, LPDDR, AXI (GDDR/CHI a plus); strong communication and presales experience; ability to travel. Category: Engineering Seniority: Senior Level Tools: RTL, DV, HBM, LPDDR, AXI, GDDR, CHI, JEDEC, ASIC Commitment: Full Time Workplace: Hybrid Languages: English