About this role
FPGA Engineer at SWISSto 12. Location: New York or New Jersey or United States. Role: designing FPGA, implementing DSP, integrating SoC Requirements: 5–7 years FPGA/ASIC experience, DSP proficiency, RTL (VHDL/Verilog/SystemVerilog), FPGA toolchains, high-speed interfaces, MATLAB/Simulink or Python, and SoC/embedded integration experience. Category: Engineering Seniority: Senior Level Tools: VHDL, Verilog, SystemVerilog, Xilinx Vivado, Vitis, Intel Quartus, JESD204, LVDS, SERDES, MATLAB, Simulink, Python, RFSoC, Xilinx/AMD Versal, Zynq, Git, eCPRI, Ethernet Commitment: Full Time Workplace: Remote Languages: English