About this role
DFT Design Engineering Director at Astera Labs. Location: San Jose, California, United States. Role: defining strategy, leading team, optimizing testability Requirements: MS/PhD in EE/CE or related, 12+ years DFT experience (5+ years leadership), deep expertise in 2.5D/3D packaging DFT, proven tape-out and production ramp experience, familiarity with DFT EDA tools and ATE platforms. Category: Engineering Seniority: Senior Level Tools: COSMOS, Synopsys DFT Compiler, TetraMAX, DFTMAX, Mentor Tessent, Advantest, Teradyne Commitment: Full Time Workplace: Onsite Languages: English