About this role
Physical Design Technical Lead at Altera. Location: San Jose, California, United States. Role: leading implementation, mentoring engineers, driving signoff Requirements: Master's in EE/CE plus 15+ years physical design experience, 4+ years technical lead experience, hands-on tapeout ownership, expertise with Synopsys/Cadence toolchains, STA, power/EMIR, UPF/CPF, Tcl/Python scripting, and ML/AI-driven physical-design workflows. Category: Engineering Seniority: Senior Level Tools: Synopsys Fusion Compiler, Cadence Innovus, Synopsys PrimeTime, Ansys RedHawk, Cadence Voltus, Mentor Calibre, Cadence PVS, Synopsys DSO.ai, Fusion Compiler AI, Cadence Cerebrus, Tcl, Python, Perl Commitment: Full Time Workplace: Onsite Languages: English