About this role
Layout Design, Sr Engineer in Etown Tan Binh at Synopsys. Location: Ho Chi Minh City, Ho Chi Minh, Vietnam. Role: designing layouts, optimizing topologies, debugging violations Requirements: 2+ years custom IC layout experience (memory, standard cells, or analog), strong layout fundamentals, proficiency with Cadence Virtuoso or Synopsys Custom Compiler, and Bachelor's/Master's in a related field. Category: Engineering Seniority: Entry Level Tools: Cadence Virtuoso, Synopsys Custom Compiler, DRC, LVS Commitment: Full Time Workplace: Onsite Languages: English