About this role
Staff Power IC Design Engineer at Analog Devices. Location: Chandler, Arizona, United States. Role: designing circuits, validating silicon, optimizing performance Requirements: MSEE (7+ years) or PhD (5+ years) in power IC design, strong transistor-level design skills, tape-out/silicon validation experience, BCD/HV-CMOS knowledge, Cadence Virtuoso/Spectre/APS proficiency, control-loop and stability expertise. Category: Engineering Seniority: Senior Level Tools: Cadence Virtuoso, Spectre, APS Commitment: Full Time Workplace: Onsite Languages: English