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Test Environment Development Eng. (Bangalore, IN, 560100) @ Vitesco Technologies GmbH

Bangalore, IN, 560100OnsiteFull-time
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About this role

<p>Schaeffler is a dynamic global technology company and its success has been a result of its entrepreneurial spirit and long history of private ownership. Does that sound interesting to you? As a partner to all of the major automobile manufacturers, as well as key players in the aerospace and industrial sectors, we offer you many development opportunities.</p> <h2><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">General Information</span></h2> <div> <div><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">This role focuses on FPGA‑based simulation and development, with an emphasis on integrating VHDL designs with MATLAB/Simulink‑based modeling and plant simulation. The position supports the evolution of both existing and next‑generation simulation platforms, leveraging FPGA and hardware expertise alongside model‑based design methodologies.</span></div> </div> <hr> <h2><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Your Key Responsibilities</span></h2> <ul> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Maintain, enhance, and extend VHDL code and Xilinx FPGA projects for existing simulation platforms and new developments</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Test, verify, and validate FPGA updates using existing and newly developed simulation testbenches</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Develop, update, and integrate MATLAB/Simulink models and plant models used within simulation and HIL environments</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Validate FPGA and simulation behavior by correlating hardware results with Simulink and plant model outputs</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Support troubleshooting and debugging activities for internal HIL systems, FPGA designs, and simulation models</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Document FPGA and simulation environment changes, updates, modeling assumptions, and implementation details clearly and accurately</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Participate actively in internal technical discussions, design reviews, and knowledge‑sharing sessions related to Simulation, FPGA development, and model‑based design technologies</span></li> </ul> <hr> <h2><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Your Qualifications</span></h2> <ul> <li><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Bachelors/Masters Degree in Eelectronics/Electrical Engineering or relevant filed with 3 to 6 years of Experience in FPGA Development</span></li> <li><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">FPGA &amp; VHDL Development</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Strong VHDL coding skills with hands-on experience using Xilinx FPGA tools and workflows</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Solid understanding of FPGA architecture, timing concepts, operating modes, and core hardware fundamentals</span></li> </ul> <p><strong><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">MATLAB / Simulink &amp; Plant Modeling</span></strong></p> <ul> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Experience working with MATLAB and Simulink for model-based design and verification</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Understanding of plant models used for system simulation, including signal flow, timing, and behavioral modeling</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Ability to integrate Simulink-based plant models with FPGA and HIL simulation frameworks</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Experience validating control logic or system behavior by comparing hardware results against simulation and plant model outputs</span></li> </ul> <p><strong><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Hardware Knowledge</span></strong></p> <ul> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Basic understanding of digital hardware circuitry with the ability to read and interpret schematics</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Experience analyzing semiconductor and electronic component datasheets and correctly applying specifications during design and simulation</span></li> </ul> <p><strong><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Testing, Measurement &amp; Debugging</span></strong></p> <ul> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Practical experience with measurement and debugging tools such as oscilloscopes, logic analyzers, and simulation testbenches</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Ability to validate FPGA and system behavior against defined requirements and efficiently diagnose and resolve issues across hardware and simulation layers</span></li> </ul> <p><strong><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Communication &amp; Collaboration</span></strong></p> <ul> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Good verbal and written communication skills with a strong teamwork mindset</span></li> <li style="font-family:arial, helvetica, sans-serif;font-size:14.0pt"><span style="font-family:arial, helvetica, sans-serif;font-size:14.0pt">Ability to collaborate closely with the Simulation team and coordinate with driver developers and software engineers on related system‑level projects</span></li> </ul><p>As a global company with employees around the world, it is important to us that we treat each other with respect and value all ideas and perspectives. By appreciating our differences, we inspire creativity and drive innovation. In this way, we contribute to sustainable value creation for our stakeholders and society as a whole. Together, we advance how the world moves.</p> <p>Exciting assignments and outstanding development opportunities await you because we impact the future with innovation. We look forward to your application.</p> <p>www.schaeffler.com/careers</p> <p>Your Contact<br> Vitesco Technologies India Pvt. Ltd. <br> Hemanth Hurudi </p>

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