About this role
Systems Validation Engineer at MaxLinear. Location: Singapore. Role: validating systems, developing tests, debugging systems Requirements: Bachelor's in CS or Electrical/Electronic Engineering, minimum 3 years hardware development and system verification experience; silicon verification, test program development, lab equipment usage, C/C++ experience; RTL/FPGA knowledge preferred. Category: Engineering Seniority: Mid Level Tools: Oscilloscope, Logic analyzer, emulation platforms, in-circuit emulation, FPGA, RTL, C, C++, High Speed Serdes, PCI, USB, PCI-E, ETHERNET, SPI Commitment: Full Time Workplace: Onsite Languages: English