About this role
Senior VLSI Verification Engineer at proteanTecs. Location: Haifa or Tel Aviv or United States or India or Korea or Taiwan. Role: developing environments, designing testbenches, driving coverage Requirements: Bachelors in Electrical/Computer Engineering, 5+ years VLSI verification experience, expertise in SystemVerilog and UVM, strong software development skills, organizational and communication abilities. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, UVM, Git, Python, FPGA Commitment: Full Time Workplace: Hybrid Languages: Swati, English