About this role
Post-Silicon Validation Engineer, Staff at d-Matrix. Location: Santa Clara, California, United States. Role: bring up, validate, debug Requirements: BS/MS in Electrical/Computer Engineering; 5+ years in high-performance SoC; embedded software/firmware/RTOS; familiarity with PCIe Gen3-5 and LPDDR; strong debugging and cross-functional collaboration. Category: Engineering Seniority: Senior Level Tools: PCIe Gen3/4/5, LPDDR3/LPDDR4/LPDDR5, RTOS, Embedded firmware, Debugging tools Commitment: Full Time Workplace: Hybrid Languages: English