About this role
Design Engineer at d-Matrix. Location: Bangalore, Karnataka, India. Role: designing RTL, verifying logic, validating silicon Requirements: Bachelor's in EE/CE/CS with 5+ years experience; micro-architecture and RTL (Verilog/System Verilog) development; exposure to computer architecture, arithmetic, interconnects; ASIC design flow knowledge; strong teamwork. Category: Engineering Seniority: Senior Level Tools: Verilog, System Verilog, RTL, RISC-V, Tensilica, ARM, Mips Commitment: Full Time Workplace: Onsite Languages: English