About this role
Senior Technology Engineer at Lattice Overview. Location: San Jose, California, United States. Role: drive alignment, validate flows, support tape-out Requirements: BS/MS/PhD in Electrical Engineering; 10+ years semiconductor tech; external foundry interfacing; CAD/EDA expertise; strong cross-functional collaboration. Category: Engineering Seniority: Senior Level Tools: CAD, EDA, PDK, DRC, LVS, EM/IR, ESD, SI/PI Commitment: Full Time Workplace: Onsite Languages: English