About this role
Digital Verification Development Engineer at Silvaco. Location: Cairo, Cairo Governorate, Egypt. Role: developing testbench, writing stimulus, analyzing coverage Requirements: Bachelor's in Electronics/Computer Engineering, 0–3 years developing SystemVerilog/UVM verification environments, strong Verilog/SystemVerilog and UVM skills, Unix/Linux proficiency, English fluency; shell/Perl/TCL and RTL/synthesis knowledge desirable. Category: Engineering Seniority: No Prior Experience Required Tools: SystemVerilog, Verilog, UVM, Unix, Linux, shell, Perl, TCL Commitment: Full Time Workplace: Onsite Languages: English