About this role
Digital Design Engineer at Silvaco. Location: Cairo, Cairo Governorate, Egypt. Role: coding RTL, developing verification, performing synthesis Requirements: BSc in electronics or related; 0–3 years VLSI digital design/verification experience; strong Verilog RTL skills, CDC/RDC, synthesis, STA/SDC, FPGA and gate-level verification; SystemVerilog/UVM, Unix and shell scripting desirable. Category: Engineering Seniority: Entry Level Tools: Verilog, SystemVerilog, UVM, FPGA, Unix, Linux, Shell scripting, STA, SDC, CDC, RDC Commitment: Full Time Workplace: Onsite Languages: English