About this role
CPU Design Engineer at Intel. Location: Bangalore, Karnataka, India. Role: implementing features, optimizing RTL, collaborating teams Requirements: Master's in Electronics/Computer Engineering with 5+ years or Bachelor's with 6+ years in RTL design; proficiency in Verilog/System Verilog, simulation/debug (Verdi), static verification tools, understanding of digital design and x86 ISA, strong communication and problem-solving. Category: Engineering Seniority: Senior Level Tools: Verilog, System Verilog, Verdi, Lint, CDC, RDC, UPF Commitment: Full Time Workplace: Hybrid Languages: English