About this role
Sr. Staff/Staff Engineer, Digital Design at InnoPhase IoT. Location: San Diego or San Jose. Role: developing SoC, designing RTL, supporting teams Requirements: Deep RTL/SystemVerilog expertise, SoC architecture knowledge, familiarity with AXI/AHB/APB/OBI, multi-clock/multi-power-domain and timing closure experience, skills with SystemVerilog, Python, Tcl, UPF, and security technologies (Arm TrustZone, Secure Boot, PSA Level 2+); MS/PhD preferred. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, Python, Tcl, UPF, AXI, AHB, APB, OBI, Arm TrustZone Commitment: Full Time Workplace: Onsite Languages: English