About this role
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
We are seeking a highly capable Senior Analog Design Manager to lead the architecture, development, and delivery of complex analog and mixed-signal IP blocks. While the role is primarily analog-focused, candidates with experience in Non-Volatile Memory (NVM), OTP, or embedded memory architectures will be strongly preferred.
This leader will guide multi-disciplinary teams across design, verification, layout, product engineering, and technology development to deliver high-quality IP across multiple technology nodes.
• Lead design and development of analog/AMS IP such as: • Voltage/current references (BGR), amplifiers, ADC/DAC interfaces • High-voltage charge pumps/regulators (especially relevant to NVM/OTP)
• Oversee circuit architecture, modeling, top-level AMS integration, and corner/Monte Carlo analysis. • Drive design reviews, spec ownership, performance validation, and silicon correlation. • Ensure robust methodologies: • Reliability analysis (EM, BTI, TDDB) • Noise coupling/PSRR, transient/small-signal analysis • ESD, latch-up, and layout-dependent effects
• Guide design flows for Verilog-A/AMS modeling and mixed-signal simulation (AMS, SPICE, FastSPICE). • Manage end-to-end IP execution, from concept definition to tape-out and silicon bring-up. • Own schedules, resource planning, risk management, and cross-team alignment. • Ensure predictable and high-quality analog IP releases aligned with platform/product milestones. • Lead and mentor a team of analog/AMS designers. • Foster collaborative culture, innovation, and continuous improvement. • Drive clear accountability, decision-making, and results-oriented execution.
• Minimum 10 years of experience in analog or mixed-signal IC design, preferably in advanced technology nodes. • Proven track record leading analog IP development through full lifecycle to production. • Strong understanding of CMOS device physics, analog design fundamentals, and layout-sensitive effects. • Experience managing and mentoring engineering teams (direct or matrix). • Exposure to NVM/OTP memory IP or embedded memory analog subsystems. • Excellent execution discipline and ability to manage complex programs.