About this role
Key Qualifications BSc or MSc level in Electrical Engineering, Computer Science, or equivalent education. At least 5 years of relevant work experience. Good understanding of VHDL or System Verilog. Significant experience of EDA tools for Synthesis & Timing/Area/Power closure Significant experience from Static Timing Analysis and timing sign off Knowledge in scripting languages (Python, Perl, TCL, Linux Shell scripting etc.) Experience from UNIX/Linux Communication and presentation skills in English are essential. Quality-consciousness. Travels may be needed but not required on a frequent basis. Following experience will be a beneficial asset Multi/Many Core CPU Architecture Knowledge a plus Experience from source code repositories such as Clear Case and Git Experience with Synopsis Spyglass, Primetime, Design Compiler & Formality Knowledge about mobile communication standards is an advantage. Knowledge of floor planning and physical implementation is an advantage Personal qualifications You have a great interest in learning new things every day and want to make a difference. You have a very positive attitude and thrive on new challenges. You are keen to solve problems and do so creatively. Where there is change you see opportunities. You are a strong team player and a very communicative person but you also work well independently. You make sure to reach results with high quality and on time. We are now looking for Synthesis and STA engineers to join our Digital Development Team within the Radio Products & Variants organization in Lund. Ericsson is investing heavily in the future 5G technology where leading-edge ASIC and FPGA development is key. Ericsson in Lund is significantly strengthening the capacity in the development of state-of-the-art digital ASIC and FPGA with a great number of talented engineers to meet this challenge. Since 2014, Lund has been a competence center for radio network development: activities span from HW and SW product development to research and standardization. We are looking for Experienced, Creative, and Innovative engineers to join our world class team. You will have a unique opportunity to work and gain competence in several areas such as synthesis, RTL-design, STA, integration, & timing/area/power closure. You will be part of a dynamic team where there will be opportunities for learning, trying out new roles and responsibilities and much more. Our organization works in accordance to the Lean and Agile principles with close team interaction. Responsibilities & Tasks SoC level STA Timing constraints development Timing sign off Netlist generation & Synthesis Floorplan development Acting as main interface towards physical implementation team Continuously improve and optimize ways of working. Participate in daily and periodic agile meetings Why is Ericsson a great place to work? Ericsson enables communications service providers to capture the full value of connectivity. The company’s portfolio spans Networks, Digital Services, Managed Services, and Emerging Business and is designed to help our customers go digital, increase efficiency, find new revenue streams, and create new user experiences. Ericsson’s investments in innovation have delivered the benefits of telephony and mobile broadband to billions of people around the world ensuring our solutions – and our customers – are at the forefront of innovation. We support networks that connect more than 2.5 billion subscribers. With over 100,000 employees and customers in 180 countries, we combine global scale with technology and service leadership. 40 percent of the world’s mobile traffic is carried over an Ericsson network.