About this role
MULTIPLE POSITIONS AVAILABLE Employer: Annapurna Labs (U.S.) Inc. Offered Position: ASIC III – AMZ010066 Job Location: 11815 Alterra Pkwy, Austin, TX 78727 Job Number: AMZ010066 Position
Responsibilities
- Design and validate high-bandwidth memory and DDR memory physical layer interfaces for machine learning accelerator chips and system-on-chip architectures.
- Integrate third-party intellectual property blocks into complex system-on-chip designs and perform advanced 2.5D packaging design for memory subsystems.
- Perform post-silicon validation and characterization of memory subsystems including bring-up, debug, and performance optimization.
- Define and implement boot-up initialization sequences, reset flows, and training algorithms for memory controllers and physical layer circuits.
- Collaborate with physical design teams to define timing constraints and review clock distribution networks for memory interfaces.
- Perform advanced system-level debugging and root-cause analysis of complex functional and performance issues through bring-up, characterization, validation, and production phases.
- Collaborate with third-party intellectual property vendors and memory device manufacturers to resolve technical issues and optimize performance parameters.
- Drive cross-functional technical teams to resolve complex functional and performance issues in production environments.