About this role
Roles and Responsibilities
• Work closely with architecture, design, verification, software, emulation, and physical design teams to enable successful subsystem and SoC integration. • Drive and own SoC assembly and integration activities, including IP onboarding, subsystem construction, top-level SoC generation, and integration validation. • Develop, maintain, and enhance IP-XACT-based methodologies using tools such as Magillem, Defacto SoC Compiler, Socrates, and other SoC integration platforms. • Define and manage SoC memory maps, address allocation, clocking architecture, reset architecture, power domains, and security integration. • Develop and maintain reusable automation frameworks and integration flows to improve productivity and ensure consistency across projects. • Manage IP packaging, configuration, version control, and integration compliance according to organizational standards and best practices. • Generate and maintain integration deliverables including RTL, IP-XACT descriptions, register specifications, software artifacts, documentation, and design databases. • Collaborate with IP providers and subsystem owners to resolve integration issues and ensure compatibility with SoC integration standards. • Debug and resolve connectivity mismatches, protocol violations, clock/reset issues, address conflicts, integration-flow failures, and configuration-related problems. • Drive integration quality by supporting lint, CDC, RDC, structural validation, and design signoff activities. • Participate in the definition and deployment of next-generation SoC integration methodologies and infrastructure. • Work with software and firmware teams to ensure smooth handoff of register maps, memory maps, and hardware configuration data. • Take ownership of specific integration domains while aligning deliverables with global methodology and project requirements. • Mentor junior engineers and provide technical leadership in SoC integration methodologies, IP-XACT adoption, and automation development. • Contribute to methodology roadmap initiatives focused on improving design reuse, automation, scalability, and integration quality across multiple SoC programs. Preferred Skills
• Experience with IP-XACT (IEEE 1685) standard and metadata-driven design methodologies. • Expertise in Magillem and/or Defacto-based SoC assembly flows. • Experience with register generation tools (CSRCompiler, RgGen, SystemRDL-based flows, or equivalent). • Familiarity with FPGA prototyping, emulation environments, and virtual platforms. • Understanding of SoC bring-up, validation, and post-silicon integration requirements. • Exposure to AI/ML-assisted design automation and methodology development is a plus.
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