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Senior Digital IC Design Engineer @ Quantummotion

London, England, GBOnsiteFull-time
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About The Role and Team <span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">Quantum Motion is a fast-growing quantum computing scale-up based in London founded by internationally renowned researchers from UCL and Oxford University with over 40 years’ experience in developing qubits and quantum computing architectures. Bringing together state-of-the-art cryogenic facilities and an outstanding interdisciplinary team, we are developing quantum processors based on industrial-grade silicon chips, with the potential to radically transform computing power in areas such as materials modelling, medicine, artificial intelligence and more.</span><br style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><br> Our Team <span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">Since 2021 our team has been listed every year in the “Top 100 Startups worth watching”</span><a href="https://www.linkedin.com/safety/go/?url=https%3A%2F%2Fwww.eetimes.com%2Fproduct%2Fsilicon-100-startups-worth-watching-in-2021%2F&amp;urlhash=VaXJ&amp;mt=M5qEupvoIC11wbWpAJQtgRrPo2oXUdlbGlR7DEpqYKXpKAR16VDjoccifmeyv9wObBMwTuNRdvRndBnepyw1n5hgq7c&amp;isSdui=true" target="_blank" style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);text-decoration:underline;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);" rel="noreferrer noopener"> in the EE Times</a><span style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"> </span><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">in 2021 and 2022, and our technology breakthroughs have been featured in</span><a href="https://www.linkedin.com/safety/go/?url=https%3A%2F%2Fwww.telegraph.co.uk%2Ftechnology%2F2021%2F04%2F01%2Fquantum-computing-breakthrough-speed-roll-decades%2F&amp;urlhash=SECX&amp;mt=JIu-j3ZsbF0xGsI4EMU94JIjPn2dh4Tlj8H-ODW9MHsHkwl89YsIpLv6kQJUYeyOzIWh4ZEfo1G-Julf14HZySVPjrs&amp;isSdui=true" target="_blank" style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);text-decoration:underline;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);" rel="noreferrer noopener"> The Telegraph</a><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">,</span><a href="https://www.linkedin.com/safety/go/?url=https%3A%2F%2Fwww.bbc.co.uk%2Fnews%2Ftechnology-56614278&amp;urlhash=eUl_&amp;mt=hp6m0nNvHclJApLwTSvHGU0HbWALnqxwCEmtxDblZYIQ9txDKjbVT7fiRDIixESHPVYny6uml1_nAOhsWPjTVxdN-cQ&amp;isSdui=true" target="_blank" style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);text-decoration:underline;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);" rel="noreferrer noopener"> BBC</a><span style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"> </span><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">and the</span><a href="https://www.linkedin.com/safety/go/?url=https%3A%2F%2Fwww.newstatesman.com%2Finternational%2F2021%2F04%2Frisks-creating-arms-race-inside-europes-battle-over-future-quantum-computing&amp;urlhash=Dmg_&amp;mt=gnhH1sq8LsL7-bqv_j5XfGmzoRZE95HcZ6iieD2ps-iQ5QWpnmNRmy_d1qiz_5E90YXG6JmI8bjZ009ScaNkiYYnO8I&amp;isSdui=true" target="_blank" style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);text-decoration:underline;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);" rel="noreferrer noopener"> New Statesman</a><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">. Our founders are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We’re backed by a team of top-tier investors, and we have recently closed our</span><span style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"> </span><a href="https://www.linkedin.com/safety/go/?url=https%3A%2F%2Fquantummotion.com%2Fseries-c-funding%2F&amp;urlhash=y6Ei&amp;mt=Rm7bhN-7Gbo5li_7UO_g-v3JkmYdvPTUQ1R4Fs0I91fdoQNxICct-OqYjaQYeDqKsfGKh3fesOkzh39HJQzFFyoTpeE&amp;isSdui=true" target="_blank" style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';color:rgba(0,0,0,0.9);text-decoration:underline;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);" rel="noreferrer noopener">Series C funding of $160 million.<br><br></a><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">We bring together the brightest quantum engineers, integrated circuit (IC) engineers, quantum computing theoreticians and software engineers to create a unique, world-leading team, working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology.</span><br style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><br style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">This is a rare and exciting opportunity to be an employee at a scale-up shaping the future of quantum computing. There are vast opportunities for professional growth and to make an impact within the company.</span><br style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><br style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">Our team of 100+ is based across London, Oxford, San Sebastián and Sydney, with our primary hub in Islington (London).</span> Functions of the Role <p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;">This senior position operates at the critical intersection of sub-Kelvin sub-system electronics and quantum processor architectures, directly addressing the interconnect bottleneck in scalable quantum computing systems. The role spans the full digital IC design cycle—including initial microarchitecture specification, RTL development, Verilog-AMS co-simulation, physical implementation (PnR/CTS), low-power synthesis, static timing analysis (STA), and full tape-out signoff. The ultimate objective is the realization of ultra-low-power, high-density cryogenic control ICs tailored for fault-tolerant quantum computing scale-out.</span></p><br><ul style="margin-top:0;margin-bottom:0;"><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Position Title:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Senior Digital Designer (Front-End &amp; Back-End)</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Domain Focus:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Ultra-Low-Power Cryogenic CMOS (Cryo-CMOS) Digital Control Sub-circuits</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Design Scope:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Full Lifecycle (RTL Development, AMS Co-Simulation, Physical Implementation, Low-Power Synthesis, and Tape-Out Signoff)</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Core Chip Architecture Target:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Cryogenic digital logic blocks operating at sub-Kelvin regimes (<4.2 K), </span></p></li></ul> Experience - Essentials <ul style="margin-top:0;margin-bottom:0;"><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Education:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Master's degree or Ph.D. in Electrical Engineering, Microelectronics, Computer Engineering, or related technical discipline.</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Chip Design Experience:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> 5+ years of hands-on digital and mixed-signal IC design, demonstrating successful completion of at least 2 tape-outs on advanced semiconductor nodes </span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Hardware Coding:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Proficiency in Verilog and SystemVerilog for synthesizable RTL development and Verilog-AMS/SystemVerilog-Real-Math for mixed-signal co-simulation and testbench environments.</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Design Tools:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Proven proficiency with industry-standard EDA toolchains (e.g., Cadence Virtuoso/Innovus/Xcelium, Synopsys Design Compiler) for mixed-signal simulation, synthesis, and verification.</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Physical Layout:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Demonstrated capability in transforming RTL into GDSII/OASIS physical layouts, floorplanning, power grid synthesis, clock tree synthesis (CTS), multi-corner multi-mode static timing analysis (MCMM STA), and physical signoff (DRC/LVS/ERC).</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Communication &amp; Logic Design:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Experience architecting high-speed serial interconnect protocols (e.g., custom SPI, AXI, SerDes) and complex finite-state machine (FSM) control logic.</span></p></li><li style="list-style-type:disc;font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"><p style="line-height:1.38;margin-top:0pt;margin-bottom:0pt;"><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:700;font-style:normal;text-decoration:none;">Low Power &amp; Thermal Management:</span><span style="font-size:11pt;font-family:Arial, sans-serif;color:#000000;background-color:transparent;font-weight:400;font-style:normal;text-decoration:none;"> Deep expertise in low-power dissipation techniques (clock gating, power gating, dynamic voltage scaling) within stringent thermal lift budgets of cryogenic cooling systems.</span></p></li></ul> Experience - Desirable <ul style="list-style-type:disc;"><li><strong>Cryogenic CMOS Experience:</strong> Hands-on experience designing, modeling, or characterizing CMOS circuits at sub-4.2 K temperatures and understanding cryo-specific transistor behavior.</li><li><strong>Mixed-Signal &amp; AMS Interfaces:</strong> Direct integration of digital logic with precision analog/RF front-ends (ADCs, DACs, LNAs, AWGs) for qubit control and readout.</li><li>Quantum Architecture Awareness: Familiarity with quantum control interfaces, pulse generation, error correction, or cryogenic spin qubit electronics</li><li><strong>Low-Power Verification &amp; UPF/CPF:</strong> Proficiency in power-aware simulation using IEEE 1801 UPF/CPF, formal LEC, and power signoff tools (Voltus, PrimePower).</li><li><strong>Advanced Process Nodes:</strong> Experience with sub-28nm nodes, with a strong preference for FD-SOI or FinFET technologies.</li><li><strong>EDA Scripting &amp; Automation:</strong> Strong scripting skills (TCL, Python) to automate synthesis, physical design, and verification flows.</li><li><strong>DFT &amp; Silicon Bring-Up:</strong> Practical knowledge of DFT insertion (Scan, MBIST) and post-silicon laboratory bring-up, testing, and debug.</li></ul> Benefits <ul style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';display:inline-block;width:627.602px;color:rgba(0,0,0,0.9);font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);"><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Be part of a creative, world-leading team</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Competitive salary and share options scheme</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Contributory pension scheme</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Group private medical insurance scheme</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Choose your own laptop/kit</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Life Assurance</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Cycle-to-work Scheme</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Flexible working</li><li style="margin:0px;padding:0px;border:0px;font-size:14px;font-family:inherit;">Central London location</li></ul> EEO Statement <span style="color:rgba(0,0,0,0.9);font-family:'system-ui', '-apple-system', 'system-ui', 'Segoe UI', Roboto, Ubuntu, Oxygen, Cantarell, 'Fira Sans', 'Droid Sans', 'Helvetica Neue', Arial, sans-serif, 'Apple Color Emoji', 'Segoe UI Emoji', 'Segoe UI Symbol';font-size:14px;font-style:normal;font-weight:400;text-transform:none;background-color:rgb(255,255,255);display:inline;">Quantum Motion is committed to providing equal employment opportunity and does not discriminate based on age, sex, sexual orientation, gender identity, race, colour, religion, disability status, marital status, pregnancy, gender reassignment or any other protected characteristics covered by the Equality Act 2010.</span> Internal Job Reference Number HRS-84

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