About this role
• Development of IC architectures. • Specification and design of analog & mixed-signal sub-systems. • Verification of design blocks at block-level, system-level and chip-level. • Active participation in product and technology roadmap planning and implementation. • Participation and leadership of design reviews for assigned areas of responsibility. • Low power ASIC design – from concept through to post-layout evaluation. • Design-For-Testability (DFT) • Maintenance of engineering documents in accordance with quality processes. • Structured tracking and implementation of design improvements. • Support for test-engineering, product engineering and operations as well as participation in ATE data reviews, limit reviews and device yield analysis. 115年8月15日（六）Team Taipei 挺就業「青年 ✦ 科技 ✦ 未來」AI產業鏈就業博覽會 活動時間：115年8月15日（六）10：30 ～16：00 (請於15:30前入場) 活動地點：圓山花博爭艷館（臺北市中山區玉門街1號） 洽詢電話：02-2338-0277 *****請親洽***** 想要知道更多活動資訊詳情，請於台北就業大補帖官網查詢 https://okwork.gov.taipei