About this role
<h2 style="text-align:center"><span style="font-size:16.0px"><span style="color:#000000"><span style="font-family:Arial, Helvetica, sans-serif"><strong>Be part of our team!</strong></span></span></span></h2> <p> </p> <p><span style="color:#000000;font-size:10.0pt"><span style="font-family:Arial, Helvetica, sans-serif">AT&S is a <strong>leading global manufacturer of high-end IC substrates and printed circuit boards</strong>. AT&S industrializes leading-edge technologies for its core business segments Mobile Devices & Substrates, Automotive & Aerospace, Industrial and Medical and high-performance computing for AI applications. We are looking for talent eager to <strong>shape the future of our interconnected world</strong>. With plants in Austria, China, India, Malaysia and sales offices around the globe, we offer excellent career opportunities for creators, innovators and enablers with the drive to make a difference.</span></span></p> <p> </p> <p><span style="color:#000000;font-size:10.0pt"><span style="font-family:Arial, Helvetica, sans-serif">To enhance our successful <strong>R&D Team</strong> <strong>in Leoben, Austria</strong>, we are looking for a passionate</span></span></p> <p> </p> <p> </p> <h1 style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:18.0pt"><span style="font-family:Arial, sans-serif">Senior Expert – Photonics & Optical Integration</span></span></strong></h1> <p> </p><p style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><span style="font-size:10.0pt;font-family:Arial, sans-serif">In your role you will be responsible for the development and evaluation of electro-optical integration concepts within a multi-partner R&D project. You will focus on co-design across optical, electrical, and packaging domains, ensuring that concepts are feasible under system-level and manufacturing constraints. The position bridges photonic design, system requirements, and integration approaches, and contributes to the assessment of viable solutions for future development and industrialization.</span></p> <p style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <h2 style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:12.0pt;font-family:Arial, sans-serif">Your Responsibilities</span></strong></h2> <p style="margin:0.0cm 0.0cm 0.0cm 0.4px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"> </p> <p style="margin:0.0cm 0.0cm 0.0cm 0.4px;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"> </p> <ul> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Develop and evaluate electro-optical integration concepts to support system-level objectives within the project </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Contribute to co-design activities across optical, electrical, and packaging domains to ensure technically consistent and feasible solutions </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Support definition and evaluation of coupling approaches, optical interfaces, and system architecture. </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Analyze simulation and experimental results to assess performance, limitations, and feasibility of integration approaches </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Identify technical challenges, constraints, and trade-offs between performance, manufacturability, and integration complexity </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Interface with external partners and research organizations to align technical approaches and consolidate results </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Support preparation of technical reports, presentations, and internal documentation </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Contribute to knowledge transfer within the organization regarding electro-optical integration approaches</span></li> </ul> <p style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"> </p> <p style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"> </p> <h2 style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"><strong><span style="font-size:12.0pt;font-family:Arial, sans-serif">Your Profile</span></strong></h2> <p> </p> <p> </p> <ul> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Master’s degree or PhD in Photonics, Electrical Engineering, Physics, Electronics, or a comparable technical field </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Relevant experience in photonics, optical integration, or advanced packaging in an industrial research-driven environment</span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Experience with Photonic integrated circuit (PIC) design, optical simulation, optical system design, optical communication systems or optoelectronic components is an advantage</span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Experience with advanced packaging with optical integration (e.g. co-packaged optics, photonic assembly) </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Experience with substrate, PCB, or advanced packaging manufacturing environments, including an understanding of process capabilities and limitations, is considered an advantage</span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Understanding of interactions between optical, electrical, and packaging domains </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Ability to analyze and interpret complex technical data (simulation and experimental) </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Ability to work across interfaces between research, development, and engineering teams </span></li> <li style="line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif;text-indent:0.4px"><span style="font-size:10.0pt;font-family:Arial, sans-serif">Fluency in English </span></li> </ul> <p style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p> <p style="margin:0.0cm;line-height:normal;font-size:12.0pt;font-family:Aptos, sans-serif"> </p><h2><span style="font-size:16.0px"><span style="font-family:Arial, Helvetica, sans-serif"><span style="color:#000000"><strong>Our Offer</strong></span></span></span></h2> <p> </p> <p> </p> <ul> <li style="font-size:10.0pt;color:black"><span style="font-size:10.0pt;color:black"><span style="font-family:Arial, Helvetica, sans-serif">A meaningful role with opportunities for long-term growth in an international environment </span></span></li> <li style="font-size:10.0pt;color:black"><span style="font-size:10.0pt;color:black"><span style="font-family:Arial, Helvetica, sans-serif">Chance to actively contribute to AT&S´ success and to create value </span></span></li> <li style="font-size:10.0pt;color:black"><span style="font-size:10.0pt;color:black"><span style="font-family:Arial, Helvetica, sans-serif">A structured and tailor-made onboarding program along with continual training opportunities</span></span></li> <li style="font-size:10.0pt;font-family:arial, helvetica, sans-serif;color:black"><span style="font-size:10.0pt;font-family:arial, helvetica, sans-serif;color:black">Modern company canteen with freshly prepared meals every day</span></li> <li style="font-size:10.0pt;color:black"><span style="font-size:10.0pt;color:black"><span style="font-family:Arial, Helvetica, sans-serif">Free parking spaces and e-charging stations</span></span></li> <li style="font-size:10.0pt;color:black"><span style="font-size:10.0pt;color:black"><span style="font-family:Arial, Helvetica, sans-serif">Diverse health measures and a wide range of employee benefits</span></span></li> </ul> <p> </p> <p> </p> <p><span style="font-size:14.0px"><span style="font-family:Arial, Helvetica, sans-serif"><span style="color:#000000">Ready for a new challenge to advance your career? It´s just a click to apply online. We look forward to your application and your detailed resume. Your AT&S Team!</span></span></span></p> <p> </p> <p><span style="font-size:12.0px"><span style="font-family:Arial, Helvetica, sans-serif"><span style="color:#000000">AT&S is an equal opportunity employer. We embrace diversity and are dedicated to empowering people to reach their potential by fostering their unique talents and strengths. The employment is in accordance with the <a title="" href="https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/ " target="_self">Austrian Collective Agreement for the Electrical and Electronics Industry</a>, employment group G, and we offer competitive salaries and additional benefits based on your performance, experience and qualification. </span></span></span></p>