About this role
<p>If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.</p> <p>Requisition ID: 77825 </p><div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Description</b></H2> </div><div><p><span style="font-size:12.0pt;font-family:'Times New Roman', serif">Seeking an experienced </span><span style="font-size:12.0pt;font-family:'Times New Roman', serif;color:#333333">Analog design engineer developing complex mixed-signal ICs</span><span style="font-size:10.5pt;font-family:Arial, sans-serif;color:#333333"> </span><span style="font-size:12.0pt;font-family:'Times New Roman', serif">for EVs, Industrial Control, Industrial Power, Isolation, and other Infrastructure applications. This role will be part of the design group that is at the forefront of the EV revolution, working to develop technologies that will revolutionize vehicles and enable new levels of power efficiency. </span><span style="font-size:12.0pt;font-family:'Times New Roman', serif;color:#333333">Candidate will take a supporting or leading role depending on experience relative to other team members, but regardless of experience level, candidate will be involved in all aspects of the design process from system conceptualization to mass production. For example, candidate will participate in <span style="font-size:12.0pt;font-family:'Times New Roman', serif;color:#333333">Analog </span>system architecture, block- and system-level RTL design/coding, algorithm and firmware development, <span style="font-size:12.0pt;font-family:'Times New Roman', serif;color:#333333">Analog </span>circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), <span style="font-size:12.0pt;font-family:'Times New Roman', serif;color:#333333">Analog </span>design verification, and full-chip mixed-signal verification. Responsibilities will also include detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required to achieve high-volume production.</span></p></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Responsibilities</b></H2> </div><div><ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="list-style:none;margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"> <ul style="list-style-type:circle;margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Architects, designs and verifies circuits, systems, algorithms, etc. to meet product requirements</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Develops innovative new designs for patenting or protecting as trade secrets</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Participates and contributes to product definition</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Balancing innovation with execution to ensure that the projects are delivered in a timely manner</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Demonstrates good judgment in solving a broad range of issues, based on an advanced understanding of industry practices and company policies and procedures</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Responsible for custom layout including overseeing the work of layout designers</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Reports on design results through design reviews</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Attends design reviews to provide input and learn from other designers’ experiences</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Sets the example for more junior members on the technical team by thoughtful use of quantitative analysis and intuition to solve mixed signal problems of advanced complexity</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="font-size:12.0pt;font-family:'Times New Roman', serif">Research design techniques through technical publications and seminars</span></li> </ul> </li> </ul></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Required Experience and Skills</b></H2> </div><div><ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="list-style:none;margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"> <ul style="list-style-type:circle;margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">BSEE + 8 years’ experience</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">MSEE + 6 years’ experience</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">PhD EE + 3 years’ experience</li> </ul> </li> </ul> <p style="text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif;margin:0.0in 0.0in 0.0in 0.0px"> </p> <p style="margin:0.0in;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"><strong>Minimum Requirements</strong></p> <ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="list-style:none;margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"> <ul style="list-style-type:circle;margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Advanced knowledge of MOS transistors and analog circuit design</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Knowledge of complex AC/DC analysis (poles, zeros, compensation), loop dynamics and feedback systems</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Advanced knowledge of device physics and CMOS/Bi-CMOS fabrication processes</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Previous design experience with complex mixed signal design problems</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Advanced knowledge in signals, systems and transforms</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Experience with end-to-end design flow from product definition to high volume manufacturing including support of production test, applications validation and manufacturing problem solving</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Advanced understanding of layout tradeoffs for performance and size</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Experience mentoring junior engineers</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Strong background in analog signal chain solutions</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Strong knowledge of circuit simulation tools, layout verification tools, modeling tools, and UNIX</li> </ul> </li> </ul> <p style="text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif;margin-top:0.0in;margin-right:0.0in;margin-bottom:0.0in;margin-left:0.0px"> </p> <p style="text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif;margin:0.0in 0.0in 0.0in 0.0px"><span>#LI-CB1</span></p></div></div><div style="padding:10.0px 0.0px;border:1.0px solid transparent"><div style="font-size:16.0px;word-wrap:break-word"><H2 style="font-size:1.0em;margin:0.0px"><b>Desired Experience and Skills</b></H2> </div><div><ul style="margin-bottom:0.0in;margin-top:0.0px"> <li style="list-style:none;margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"> <ul style="list-style-type:circle;margin-bottom:0.0in;margin-top:0.0px"> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Knowledge of high voltage processes and design in BCD and/or SOI type processes</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Previous design experience with integrated power conversion circuits (Low noise Front end amplifier, SD/SAR ADCs, low noise references, DC-DC/Power converters, charge-pumps, LDO’s, rectifiers, amplifiers)</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Advanced MOS Device modeling skills (noise, excess thermal noise, DIBL)</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Exceptional laboratory measurement skills</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">System knowledge (e.g., isolators) and advanced design skills in system modeling</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Understanding of mixed signal solutions including discrete time digital signal processing</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif">Familiarity with quality systems documentation and procedures</li> <li style="margin:0.0in 0.0in 0.0in 0.0px;text-align:justify;font-size:12.0pt;font-family:'Times New Roman', serif"><span style="font-size:12.0pt;font-family:'Times New Roman', serif">Excellent written and verbal presentation skill</span></li> </ul> </li> </ul></div></div></div><p>Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.</p>