About this role
Wafer Level Packaging Process Engineer at Flir. Location: Goleta, California, United States. Role: owning processes, optimizing bonding, troubleshooting equipment Requirements: Bachelor's degree (or equivalent experience),1+ years semiconductor process engineering, wafer bonding experience, tool ownership, DOE/SPC experience, ability to support HVM ramp and troubleshoot bonding tools; must be US citizen or PERM resident. Category: Engineering Seniority: Entry Level Tools: EVG, SUSS, MES, Camstar, SPC, DOE Commitment: Full Time Workplace: Onsite Languages: English