About this role
Layout Design Engineer at Intel. Location: Bengaluru, Karnataka, India. Role: developing layouts, performing verification, optimizing layouts Requirements: Bachelor's or Master's in electrical/electronics engineering, 0+ years layout experience, proficiency with Cadence Virtuoso, Calibre DRC and ICV, CMOS layout knowledge, and scripting (TCL/Python/Perl) preferred. Category: Engineering Seniority: No Prior Experience Required Tools: Cadence Virtuoso, Calibre DRC, ICV, TCL, Python, Perl Commitment: Full Time Workplace: Hybrid Languages: English