About this role
Memory Layout Engineer at Cisco. Location: Zhubei, Hsinchu County, Taiwan. Role: designing layout, ensuring signoff, mentoring members Requirements: Bachelor's in EE/CS,5+ years embedded memory layout experience,proficiency with Virtuoso and Calibre,strong communication and collaboration skills. Category: Engineering Seniority: Senior Level Tools: Virtuoso, Calibre Commitment: Full Time Workplace: Hybrid Languages: English