About this role
Machine Learning and Multimedia IP Verification Manager, Silicon at Google. Location: San Diego or Mountain View. Role: leading team, planning verification, debugging tests Requirements: Bachelor's in EE/CE/CS or equivalent; 10 years verifying RTL with SystemVerilog; experience leading verification teams; UVM and OOP experience; strong verification planning and debug skills. Category: Engineering Seniority: Senior Level Tools: SystemVerilog, UVM, System Verilog Assertions (SVA) Commitment: Full Time Workplace: Onsite Languages: English