About this role
レイアウト設計業務 at Renesas Electronics. Location: Takasaki, Gunma, Japan. Role: designing layout, verifying layout, preparing tapeout Requirements: Experience in semiconductor IC layout, knowledge of chip development flow, business-level Japanese and reading/writing English; experience with analog/mixed-signal layout and high-voltage insulation preferred. Category: Engineering Seniority: Mid Level Tools: DRC, LVS, ERC Commitment: Full Time Workplace: Hybrid Languages: Japanese, English