About this role
MASTER THESIS OPPORTUNITIES at Kvaser. Location: Mölndal, Västra Götaland, Sweden. Role: develop test, analyze CAN, implement FPGA Requirements: Master thesis project in CAN-FD, CAN-bit validation, and digital twin simulations; includes FPGA, Python, and potentially Rust/C. Category: Research and Development (R&D) Seniority: No Prior Experience Required Tools: Verilog, Python, C, Rust Commitment: Full Time Workplace: Onsite Languages: English