About this role
R&D Process Engineer - Wafer Wet Process Engineer at Keysight Technologies, Inc.. Location: Santa Rosa, California, United States. Role: developing processes, driving improvement, analyzing metrics Requirements: M.S. or Ph.D. in materials-related field; 5+ years process engineering experience with semiconductor wet processes (CMP, stripping, etch, plating); familiarity with chemical handling, SPC and DOE, strong problem-solving and communication skills. Category: Research and Development (R&D) Seniority: Senior Level Tools: JMP Commitment: Full Time Workplace: Onsite Languages: English