About this role
R&D Engineering, Scientist - 17200 at Synopsys. Location: Boxborough, Massachusetts, United States. Role: Leading architecture, Guiding development, Translating requirements Requirements: 15–20+ years in high-speed memory interface or PHY design; DDR/LPDDR/HBM/Die-to-Die/SerDes experience; strong SI/PI; PhD preferred. Category: Engineering Seniority: Senior Level Tools: DDR, LPDDR, HBM, SerDes, I/O design, PHY design, Circuit design, Signal integrity, Power integrity Commitment: Full Time Workplace: Hybrid Languages: English