About this role
Risc-V Architect at Tenstorrent. Location: Toronto or Austin. Role: Architect cores, Analyze workloads, Collaborate teams Requirements: Senior CPU architect with 10+ years in performance modeling and microarchitecture; proficient in C++ and Python; familiar with RISC-V cores and LLVM. Category: Engineering Seniority: Senior Level Tools: C++, Python, RISC-V, LLVM Commitment: Full Time Workplace: Hybrid Languages: English