About this role
AI Chip Architect at FuriosaAI. Location: Seoul, Seoul, Korea. Role: Define architecture, Converge PPA, Implement RTL Requirements: Master’s in Electrical Engineering or Computer Science or equivalent; 2+ years RTL design; experience with C++ and PPA modeling; scripting for automation. Category: Engineering Seniority: Mid Level Tools: SystemVerilog, C++, Chisel, RISC-V, Scripting Languages Commitment: Full Time Workplace: Onsite Languages: English