Senior Staff Engineer, SoC Architecture – Memory Subsystem and Interconnect @ Samsung Research America

Senior Staff Engineer, SoC Architecture – Memory Subsystem and Interconnect at Samsung Research America. Location: Mountain View, California, United States. Role: designing architecture, modeling performance, delivering specifications Requirements: BSc/Masters/PhD in CS/Engineering, 9+ years SoC/ASIC design experience with >7 years in fabric/system cache/DRAM controller architecture; knowledge of ARM ACE/AXI/AHB, JEDEC standards (LPDDR/DDR/HBM); performance modeling and simulation experience. Category: Engineering Seniority: Senior Level Tools: BookSim Simulator, Platform Architect, ACE, AXI, AHB, LPDDR, DDR, HBM Commitment: Full Time Workplace: Onsite Languages: English