About this role
HDD Servo Processing Subsystem Architecture Lead at Western Digital. Location: San Jose, California, United States. Role: defining architecture, leading teams, mentoring engineers Requirements: Bachelor's in EE/CE/CS, 10+ years embedded architecture experience, 5+ years technical leader experience, FPGA/ASIC experience, C/C++, HDL, MATLAB/Simulink, Renode, Verilator, LLVM, real-time multi-core expertise. Category: Engineering Seniority: Senior Level Tools: C/C++, HDL, MATLAB, Simulink, Renode, Verilator, LLVM, FPGA, ASIC Commitment: Full Time Workplace: Onsite Languages: English