About this role
Debug Architect at Tenstorrent. Location: Toronto, Ontario, Canada. Role: Define debug, Design debug, Validate debug Requirements: Experienced in hardware debug for CPU, SoC, or ASIC systems; strong processor architecture knowledge (RISC-V/x86/ARM); familiar with debug, profiling, and trace methodologies (iJTAG); comfortable across hardware/software boundaries; proficient in HDL (Verilog/VHDL) and Python/Git. Category: Engineering Seniority: Mid Level Tools: Verilog, VHDL, Python, Git Commitment: Full Time Workplace: Hybrid Languages: English