About this role
Lead Performance Modeling Architect, CPU Fabric and LLC at Nvidia. Location: Santa Clara or California. Role: Define vision, Lead team, Resolve bottlenecks Requirements: Lead modeling of cache hierarchies and interconnects; 8+ years in high-performance silicon architecture; manage teams; strong C++/SystemC and modeling expertise. Category: Engineering Seniority: Senior Level Tools: C++, SystemC, CHI Commitment: Full Time Workplace: Onsite Languages: English