About this role
Display Synthesis Sr/Lead/Staff at Qualcomm India Private Limited. Location: Bengaluru, Karnataka, India. Role: performing synthesis, validating constraints, managing timing Requirements: Senior-level hardware engineering role requiring deep expertise in physical synthesis, timing closure, low-power implementation, scripting (Perl/Python/TCL), and leading engineering teams for display subsystem projects. Category: Engineering Seniority: Senior Level Tools: Synopsys DCG, Genus, Fusion Compiler, Synopsys PrimeTime, Cadence Conformal LEC, Cadence Conformal Low Power, Perl, Python, TCL, RTL Lint, CLP, MEMBIST, DFT DRC, UPF, MCMM, LEC Commitment: Full Time Workplace: Onsite Languages: English