About this role
Chip Lead, Senior Director at Astera Labs. Location: San Jose or Israel. Role: Own lifecycle, Drive tapeout, Lead cross-functional Requirements: Bachelor’s in Electrical/Computer Engineering; 15+ years in architecture, silicon design, validation, or related domains; strong leadership and cross-functional collaboration. Category: Engineering Seniority: Senior Level Tools: RTL design, DFT, Physical design, BIST, Tapeout, UCIe, UALink, PCIe, Ethernet Commitment: Full Time Workplace: Hybrid Languages: English